Isolate and Protect
Overview
Isolate and Customize
Collaborate and Integrate
Divide and Conquer
dsPIC33CH Digital Signal Controller (DSC)
Isolate and Protect
Collaborate and Integrate
Divide and Conquer
High in Performance, Low in Cost
Main Core at 90 MHz
Secondary Core at 100 MHz
Parallel Development
Independent Operation
Parallel Development
Independent Operation
Isolate and Customize
Overview
Dedicated Peripherals
5 Register
Sets
5 Accumulator Sets
72 KB PRAM
16 KB Data RAM
Dedicated Peripherals
48 KB Data RAM
512 KB Flash
5 Accumulator Sets
5 Register
Sets
Isolate and Protect Safety Firmware From the Rest
Main Core at 90 MHz
Parallel Development
Independent Operation
AUTOSAR®
Housekeeping Code
Non-Safety
Application Code
Non-Safety Firmware
dsPIC33CH Digital Signal Controller (DSC)
QM/ASIL A
Parallel Development
Independent Operation
ASIL B
Safety
Application
Code
Safety Firmware
Secondary Core at 100 MHz
Isolate Application-Specific Fixed Function and Customize System Interfacing
Parallel Development
Independent Operation
Touch Code
Fixed Function
Device
Safety Firmware
Secondary Core at 100 MHz
Parallel Development
Independent Operation
Main Code
CAN/LIN Communication
Housekeeping Code
Non-Safety Firmware
Main Core at 90 MHz
dsPIC33CH Digital Signal Controller (DSC)
Enable Collaboration With Multiple Design Teams and Integrate Seamlessly
Parallel Development
Independent Operation
Qi® Software
Power Control
Demodulation
Authentication
Safety Firmware
Secondary Core at 100 MHz
Parallel Development
Independent Operation
AUTOSAR®
CAN Communication
Housekeeping
Non-Safety Firmware
Main Core at 90 MHz
dsPIC33CH Digital Signal Controller (DSC)
Divide Time-Critical Functions Between Cores and Conquer Integration Challenges
Parallel Development
Independent Operation
Field-Oriented Control of Fans and Compressor Motors
Safety Firmware
Secondary Core at 100 MHz
Parallel Development
Independent Operation
PFC
Housekeeping
Communications
Non-Safety Firmware
Main Core at 90 MHz
dsPIC33CH Digital Signal Controller (DSC)
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