Cost Effectiveness
High-performance devices are available in a compact 4 4 mm package to reduce design form factor
High level of analog integration reduces the need for external components and lowers Bill of Materials (BoM) cost
Cost-effective 3V dsPIC33 DSC with 5V-tolerant I/Os lowers system cost
Scalable devices offer 32 KB to 1024 KB Flash memory and common peripherals to enable easy migration
Cost Effectiveness
Data
Acquisition
Signal
Conditioning
AEC-Q100 Grade 0 Qualified
Data
Processing
Robust
Operation
Embedded
Security
Functional
Safety
Data Acquisition
Multiple 3.5 Msps or up to 40 Msps 12-bit Analog-to-Digital Converters (ADCs) for high-speed and simultaneous signal sampling
Oversampling filters and digital comparators in the ADC controller for noise filtering
Core-independent ADC operation for real-time signal acquisition
Wide range of ADC conversion trigger sources including Peripheral Trigger Generator (PTG)
Automated ADC sampling and conversion process with no CPU interruption
Tight coupling of Direct Memory Access (DMA) and ADC to store conversion results directly to data memory
Signal Conditioning for Noise Reduction
High-speed op amps for active filtering, signal conditioning and reducing power disturbance (unity-gain buffer)
Fast analog comparators for fast event detection
High-speed, 12-bit DACs to provide accurate voltage reference to sensors
Current Bias Generator (CBG) to provide biasing for external circuitry or sensors
Data Processing with Real-Time Responses
Our new high-performance dsPIC33A core devices can support up to 200 MHz and are equipped with a Double-Precision Floating-Point Unit (DP-FPU) coprocessor, whereas the dsPIC33C family can provide 100 MHz performance and offer single- and dual-core options. Our dsPIC33C DSCs come with the following features:
Robust Operation
5V operation of select DSCs offers noise immunity and robustness
5V-tolerant IOs on 3V dsPIC33 DSCs enable seamless integration without any glue logic, level shifters or voltage translators
40°C to 150°C operation with AEC-Q100 Grade 0 qualification for under-the-hood automotive designs
Robust communication with CAN FD, LIN, SENT, 10BASE-T1S Single-Pair Ethernet (SPE) and other protocols
Data EEPROM emulation library enables emulating high-endurance EEPROM using the on-chip program memory
Functional Safety
Functional safety compliant/ready dsPIC33 DSCs with dedicated hardware safety features that enable designs targeting ISO 26262, IEC 61508 and IEC 60730 compliance
Accelerated boot time with hardware safety features
Memory Built-in Self-Test (MBIST) for RAM performs diagnostics 28 times faster than the software diagnostic APIs
Flash with Error Correcting Code (ECC) reduces software diagnostic overheads
Fail-Safe Clock Monitor (FSCM) with backup FRC oscillator for recovery during clock failure
Other hardware safety features include ECC RAM, IO pin integrity monitors, Deadman Timer, CRC, WDT and more
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Embedded Security
dsPIC33 DSCs, when used with one of our CryptoAuthentication™ or CryptoAutomotive™ security ICs, enable the implementation of robust security
Support for secure boot with immutability, secure firmware upgrade, secure communication, node authentication, IP protection and more
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DSP engine for accelerated real-time signal processing such as FIR filler, IIR filler, n-FFT, data conversion functions and more
Optimized DSP routines available as built-in libraries within MPLAB® XC Compiler
Fast execution of DSP functions, which are optimized for performance
Low-interrupt switching using multiple sets of context registers and DSP accumulators
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